A Specification-Based Approach to Generate Verification Rules of Reactive Software | ||
| The Modares Journal of Electrical Engineering | ||
| Article 2, Volume 10, Issue 1, 2010, Pages 13-38 PDF (1.57 M) | ||
| Authors | ||
| Seyed Morteza Babamir* 1; sayed Jalili2 | ||
| 1University of Kashan | ||
| 2Tarbiat Modares University | ||
| Abstract | ||
| Static verification and software testing are not able to verify software single-handedly. Therefore, another approach called run-time verification dealing with verifying software behavior against constraints at run-time received attention. However, the run-time verification faces the problem of verification of run-time activities against the constraints are specified in high-level and abstractly because their natures are different from each other. Focused on reactive software, in three steps this paper presents an approach called SRG to generate run-time verification rules in terms of run-time activities from abstract specification and constraints of problem. The approach: (1) presents a visual and reactive model of problem specification and then generates ground rules of run-time behavior of software in real-time logic, (2) specifies in real-time logic the constraints should be met by software at run-time, and (3) generates verification rules from the constraints and the ground rules. Last of all, the SRG approach is applied to message communication protocol. | ||
| Keywords | ||
| Run-time verification; Verification rules generation; Reactive software | ||
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